The IFAE pixel group aims to make major contributions to the ATLAS upgrade effort towards the high-luminosity LHC period. During 2017 the Pixel group achieved two important milestones: 3D pixel sensor became the baseline for the innermost ATLAS ITk Pixel detector and the LGAD sensor technology was selected for the HGTD detector. The ultimate goal is to fabricate sensors, assemble modules and conduct the quality control tests in Barcelona for both HGTD and the ITk Pixel detector.
3D pixel sensors fabricated locally at CNM-Barcelona, were shown to be the most radiation hard option for the high-luminosity LHC ATLAS upgrade. The devices were assembled and tested up to unprecedented fluencies, surpassing the requirements of the future experiment. The technology developed at Barcelona is the baseline for the innermost layer of the future Pixel detector. In parallel, the group played a leading role in the advancement of the Low Gain Avalanche Detector (LGAD) technology, also pioneered at Barcelona. LGAD is the technology of choice for the future timing subsystem of the ATLAS detector, called the High Granularity Timing Detector (HGTD). The group demonstrated the excellent timing performance of these sensors before and after irradiation, and fabricated the first hybrid prototypes consisting of an LGAD sensor connected to a custom-made readout chip. Finally, the group is designing and developing fully monolithic active CMOS sensors in the context of the ATLAS tracker upgrades and investigating other applications of this cost-effective technology.
The group carried out an aggressive campaign to demonstrate that the 3D pixel technology is the optimal solution in terms of radiation hardness and power dissipation for the demanding innermost pixel layer of the future inner tracker of the ATLAS detector. Due to the delay of the fabrication of the ITk front-end prototype (called RD53A), the measurements were carried out with the previous FE-I4 chip, but including ITk-like pixels in the sensors. Results demonstrating the excellent performance of the 3D technology in terms of hit reconstruction efficiency, were presented in international conferences (for example J. Lange, HSTD11, Japan, Dec 2017) and ultimately led to the selection of the 3D technology as the baseline for the innermost Pixel detector layer. This is reflected in the ITk Pixel TDR, of which S. Grinstein is a member of the editor team.
However, critical sensor issues related to the future Pixel detector remain to be addressed, like the selection of the pixel size of the innermost layer (50×50 $\mu m^2$ or 25×100 $\mu m^2$ ), the final thickness of the sensors (150 $\mu m$ or other) and the performance of the sensors with the final front-end chip.
The group also made important advancements in the HGTD activities during 2018. The sensor technology pioneered by CNM-Barcelona was chosen as a baseline for the HGTD detector and the excellent results in terms of timing resolution before and after irradiation obtained previously were consolidated. Though the HGTD proposal is still under approval by ATLAS, IFAE is cementing a probable contribution to this detector as well, since it is playing a leading role in the development cycle of the system: J. Lange is the sensor co-convener, E. Gkougkousis is the test-beam coordinator and R. Casanova is playing a critical role in the HGTD ASIC development. Furthermore, all the prototypes of the HGTD modules, including LGAD sensors connected to the prototype HGTD readout chip, have thus far been fully assembled at IFAE.
An extensive measurement campaign is on-going to qualify the CNM LGAD sensors to high fluences at the end of the life-time of the HGTD detector, which has been already achieved by sensors from Hamamatsu (HPK), Japan.
The group is playing an important role in the development of depleted CMOS devices for the upgrade of particle trackers in the context of the HL-LHC. The focus of IFAE since the beginning of these activities was the development of cost-effective monolithic depleted-CMOS detectors, in which the sensor and the readout electronics are integrated in one silicon chip. The monolithic approach is now being considered for the ATLAS Pixel upgrade, while the hybrid option that requires the connection to an external readout chip has been abandoned. During 2018 the group completed the performance studies of the first full-size monolithic prototype developed by IFAE and two other institutions (for example see S. Terzo, INSTR17, Russia, Mar 2017), obtaining very encouraging radiation hardness results for this commercial technology.
Furthermore, CMOS structures have been designed by R. Casanova targeting applications beyond High Energy Physics, in particular for usage in synchrotron light sources.