ATLAS Pixels

Sebastián Grinstein


The Pixel group develops new silicon detector technologies for high energy physics experiments and other applications. After making key contributions to the ATLAS IBL and AFP sub-systems the group is qualifying for the production of 3D sensor modules for the ITk pixel detector and has produced the first full size module prototypes for HGTD. In parallel the group is exploring monolithic devices (DMAPS) for HEP and other applications.

ITk Upgrade

The ATLAS pixel detector upgrade activities for the High Luminosity LHC are progressing toward the production phase. IFAE is responsible for fabricating and testing the innermost pixel modules of the barrel region (called linear triplets). The institute has dedicated space and machinery in the white and grey rooms, where the assembly and characterization of modules are being carried out. In 2024, a total of 14 triplet modules were assembled and fully tested at IFAE. Due to delays in the ITk Pixel schedule, these modules incorporated the ITkPixV1.1 chip instead of the final V2.0 front-end. However, the pre-production process was otherwise expected to closely resemble the final production. In parallel, a digital module with the ITkPixV2.0 chip was also assembled and tested. These triplets played a critical role in the Production Readiness Review (PRR), which was completed in November 2024. The production of 130 linear triplets at IFAE is expected to begin in the spring or summer of 2025 and last approximately 1.5 years. However, this timeline is later than originally planned due to various delays in the ITk project.

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Figure 1: Linear triplet module assembly at the IFAE microelectronics clean room.

High Granularity Timing Detector (HGTD)

As part of the HL-LHC upgrade, the ATLAS experiment will install a new High Granularity Timing Detector (HGTD) between the forward and central calorimeters, covering the region 2.4<∣η∣<4.0. The HGTD will precisely measure the time associated with particles produced in the HL-LHC proton-proton collisions. In 2024, IFAE fabricated more than 30 ALTROC3 modules. Given the challenges faced by HGTD modules in surviving thermal cycles, IFAE proposed increasing the thickness of the substrates to enhance their mechanical robustness. This solution was adopted by HGTD, leading to an increase in sensor thickness to 775 µm. The module Final Design Review (FDR) was successfully completed in October 2024. The hybridization and module pre-production phases are set to begin in 2025. IFAE is playing coordinating roles in these activities. In parallel, the group continued improving Alvin, the HGTD module readout system developed by IFAE. Alvin is used for device characterization in various labs and is also fundamental for the test-beam DAQ. Additionally, the group remains actively involved in module performance activities, leading various efforts to enhance overall system performance.
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Figure 2: HGTD ALTIROC-A modules assembled at IFAE being tested in the gray room using the Alvin DAQ system.

DMAPS (Monolithic Devices)

Depleted Monolithic Active Pixel Sensors (DMAPS) integrate both the sensor and front-end electronics on a single substrate, eliminating the need for a complex sensor-to-chip interconnection process. Modern CMOS technologies provide good radiation tolerance, making DMAPS an attractive alternative for tracking detectors in High Energy Physics (HEP). IFAE has been working on the design and characterization of DMAPS for the last ten years. Recently DMAPS are increasingly being explored for timing measurements. IFAE, in collaboration with IRFU (France), designed a new prototype using LFoundry 150 nm HV technology: the Mini-CACTUS-V2 chip. This chip features an improved pre-amplifier design aimed at enhancing jitter performance and reducing recovery time. In 2024, chips fabricated in 2023 were characterized at IFAE and tested in beam experiments. The Mini-CACTUS-V2 chip demonstrated significantly improved performance, achieving a time resolution of 63 ps at 300 V with a recovery time of less than 25 ns, using a 0.5 × 0.5 mm² pad on a 175 µm thick device. These results are being published in JINST.

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Figure 3: Mini-CACTUS-V2 with pre-amplifiers designed by IFAE being tested with particle beams at CERN.

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Figure 1: Linear triplet 3D pixel modules fabricated and tested at IFAE being loaded at SLAC (US).